In modern high-performance FPGA-based systems, the choice of high-speed connectivity interfaces is a key factor in achieving optimal performance. These interfaces must support maximum data throughput, ultra-low latency, efficient resource utilization, and seamless integration with the FPGA fabric. From accelerating AI and machine learning workloads to enabling high-bandwidth networking in data centres, the demand for robust and versatile connectivity solutions continue to grow.
iG-G64M Speedster7t FPGA-based System-on-Module (SoM), enables the user with the various capabilities which includes the PCIe Gen 5 interface, 200G, 400G and potentially 800G ethernet interfaces along with the High-Bandwidth Internal Fabric via 2D NoC which enables the reduced routing congestion and shorter internal interconnect latency. Thus the combination of the PCIe gen 5, ultra-high speed ethernet and 2D NOC address the key issue of the timing closure generally observed in high-speed designs. Additional overview and key features are available here.
This article provides an in-depth exploration each of these key elements offering a comprehensive perspective for designers seeking high-speed, high-efficiency FPGA solutions.
PCIe Gen5
The Speedster7t SoM features PCI Express Gen5, enabling data rates of up to 32 GT/s per lane. With support for up to 16 lanes, the module provides massive aggregate bandwidth up to 512 Gbps for high-performance applications, including AI acceleration, HPC, and high-speed networking.
PCIe endpoints are directly connected to the FPGA’s Network-on-Chip (NoC), allowing high-speed, low-latency data transfers ensuring that high-throughput PCIe traffic is seamlessly distributed to memory controllers, Ethernet interfaces, or custom accelerators within the FPGA fabric.
Key Highlights:
- Supports x1, x4, x8, x16, and scalable lane configurations, providing flexibility for diverse applications.
- Fully backward compatible with PCIe Gen4, Gen3, and Gen2
- Integrated PCIe hard IP blocks optimize DMA transfers, reducing latency and offloading CPU resources.
- Optimized for low-latency, high-throughput operations
200G/400G/800G High-Speed Ethernet
The Speedster7t SoM delivers exceptional high-speed Ethernet performance, achieving up to 400 Gbps and potentially up to 800 Gbps with each of the hard controllers. With four NAPs operating in parallel each managing 100 Gbps—the platform enables massive parallel data processing and fully leverages the performance of the integrated NoC architecture.
Additionally, the Speedster7t features two high-performance Ethernet controllers, each supporting up to 8 lanes and capable of operating at maximum link speeds, delivering potentially 800Gbps throughput and unparalleled scalability.
Ethernet Architecture and Integration:
The Ethernet subsystem has been validated using packet generator and checker logic and can subsequently be integrated with user-defined logic for application-specific functionality.
The block diagram illustrates how the packet generator and checker logic, implemented within the fabric, interfaces with the Ethernet subsystem through the Network-on-Chip (NoC) using Network Access Points (NAP0 to NAPn).
Key Highlights:
- 200G/400G/800G support
- Scalable multi-lane Ethernet links
- Each NAP provides direct NoC access, enabling high-performance interconnect with FPGA processing pipelines and supports parallel packet flows and load balancing across multiple NAPs to optimize throughput.
The detailed demonstration video describes the testing of PCIe and ethernet interfaces using the standard dev kit available for this SOM.
Conclusion
The iG-RainboW-G64M Speedster7t FPGA-based SoM redefines high-speed connectivity for next-generation computing and networking applications. With its powerful integration of PCIe Gen5 and 200G/400G/800G Ethernet interfaces, combined with Achronix’s advanced Network-on-Chip (NoC) architecture, the SoM delivers exceptional throughput, low latency, and unmatched scalability.
By enabling direct, parallel data paths between high-speed interfaces and on-chip accelerators, the platform ensures optimal utilization of FPGA resources—making it ideal for AI/ML acceleration, data center networking, and HPC workloads. Its flexible configuration, multi-lane support, and robust performance validation make the iW-RainboW-G64M a future-ready solution for demanding high-bandwidth, real-time processing systems.
