SDR Based on ZU7 MPSoC with JESD Data converter

iG-G30-SDR-2T2R

Wideband RF Coverage: Supports 47 MHz to 6 GHz with flexible bandwidth up to 56 MHz, enabling multi-standard SDR applications.
High-Performance Processing: Powered by AMD ZU7 MPSoC, combining ARM cores and FPGA fabric for real-time signal processing.
High-Speed Data Throughput: PCIe Gen3 x8 interface delivering up to 64 Gbps for low-latency, high-bandwidth streaming.
2×2 MIMO Capability: Integrated AD9361 RF transceiver with dual-channel TX/RX and 12-bit ADC/DACs.
Scalable & Synchronized Design: Supports multi-tile synchronization (MTS) with SYSREF for phase-coherent multi-channel systems.
Flexible & Software-Defined: GNU Radio support, dynamic reconfiguration, and compatibility with Linux/Windows and GPU acceleration.

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Features	Details
SDR Based on MPSoC	FPGA Chipset: AMD ZU7 MPSOC RF Transceiver: AD9361 Channels: RF 2 × 2 transceiver with integrated 12-bit DACs and ADCs TX band: 47 MHz to 6.0 GHz RX band: 70 MHz to 6.0 GHz Tunable channel bandwidth: <200 kHz to 56 MHz PCIe Bandwidth: 64Gbps with Gen 3, x8 lane Form Factor: Full-Height Half-Length PCIe Multi-tile synchronization (MTS) with SYSREF inputs Configurable number of channels Dynamic tuning of the decimation and interpolation Burst mode or continuous modes data streaming Frequencies, channels, and signal chains configuration through host drivers
Software Stack	Robust Linux and Windows*** host OS support SDR Frameworks and Toolkits like GNU Radio and Pothos GPU Acceleration for Real-Time Processing Analysis and Visualization using GNU radio, Octave, SciPY, Python etc.
Host Interface	Full-Height Half-Length PCIe form factor, suitable for integration into Host PC systems. Linux OS (above 20.04), 16GB RAM minimum CPU 8 Core Minimum.