Speedster7t
SmartNIC – 400G

G64-KFibre-400G®

  • 3/4 Length, Full Height, Dual Slot
  • Gen5 x16 Host Interface
  • QSFP112 Cage (400GbE/200GbE)
  • i.MX 8XLite dual Arm Cortex-A35 & Cortex-M4F
  • Remote update of the FPGA fabric
  • Security features for encrypting and authenticating bitstreams
CONTACT SALES
img Speedster7t SmartNIC – 400G img Top View img Side view img Hardware Block Diagram img OFS Design

Documents

Documents

White Paper

Features Details
PCIe NIC Card
  • 254mm x 111.15mm, 3/4 Length, Full Height, Dual Slot with Active Cooling PCIe Card.
  • Achronix Speedster7t 1500t FPGA with F53 package
    • 692K 6-input LUTs
    • 2560 LRAMs and 2560 BRAMs
    • 2560 MLPs
    • 32 Serdes Channels
  • PCIe Gen5 x16 Host Interface
  • QSFP-DD Cages
    • QSFP-DD (800GbE/400GbE)
      • 112G PAM4 Transceivers
      • 800/400/200GbE
    • QSFP112 Cage (400GbE/200GbE)
      • 112G PAM4 Transceivers
      • 400/200GbE
  • NVMe Slot – Gen 5 x4 for Storage media over M.2
  • External Clocking – 1PPS and 10MHz ref clock
  • Memory on board
    • Single Channel DDR4
      • 8GB with ECC, 72b, 2666MHz DDR4 @341.2Gbps
    • 14 Channels of GDDR6
      • 7 x 2GB GDDR, 32b @16Gbps per channel
  • i.MX 8XLite Co-Processor
    • Dual Arm Cortex-A35 & Cortex-M4F
    • 2GB LPDDR4 Memory
    • 8GB eMMC Flash
    • 1G Ethernet RJ45
  • Max10 Board Management Controller.
    • Voltage, Current and Temperature Monitoring
    • Field Updates of FPGA (Partial reconfiguration)
    • FPGA Configuration and Control
    • I2C Bus access
    • USB 2.0
    • Voltage Overrides
ANIC Shell
  • ANIC implements a 400G Modular Pipeline with –
  • Packet Interface
  • FIFO Buffer which utilizes the GDDR6
  • Parser to extract headers
  • Flow Processor which uses Rule Engines
  • Accelerator Logic region which can be used to incorporate the Accelerator function
  • DMA Engine to the Host
  • Low Latency Data processing – 2D Network on Chip (NoC) reduces latency.
  • Dynamic Reconfiguration enables real-time updates to the Accelerator Logic Region
Host Server Environments
  • PCIe – Gen 5×16
  • Disk: Free Space up to 50GB
  • Memory: 128GB
  • BIOS: Enable IOMMU, Huge pages
  • OS: RHEL, Ubuntu 20.04 LTS and above
  • Driver & Application: ANIC SDK
ANIC Software
  • Command line shell for diagnostic access to the card
  • Monitors Ethernet port
  • Packet transmission and reception statistics
  • Set and monitor the ANIC clock
img

Achronix Accelerated Network Infrastructure Code (ANIC):

  • NIC functionality scaling to 400G
  • Two-dimensional NoC
  • Synchronize ANIC Clock
  • Status and Statistics of Ethernet

Buy Now

img

Product Design Process

Our design process transforms your vision into reality with innovation, quality, and collaboration.

Learn More

img

Certification & Qualification

Ensuring Compliance, Quality, and Trust Through Certification & Qualification.

Learn More

img

Product Lifecycle Management

Ensuring Longevity, Reliability, and Seamless Product Evolution.

Learn More

img

Mechanical Services

Precision Engineering for Reliable, High-Performance Mechanical Solutions.

Learn More

video-thumbnail
youtube-play-icon
video-thumbnail
youtube-play-icon
video-thumbnail
youtube-play-icon
img

Networking on Windows through iW-Fibre SmartNIC

Learn More
img

iWave SmartNIC for RDMA and Storage Offload

Learn More
img

Dynanic with iWave FPGA Shell on iW-Fibre SmartNIC

Learn More
img

ZU11EG MPSoC SoM on Quantum Computing

Learn More
img

ZU49/ZU39/ZU29DR RFSoC SoM on Radio Telescope

Learn More
img

Custom Design ZU19EG MPSoC SoM on LiDAR

Learn More