Serial FPDP (sFPDP) 17.1

Name: Serial FPDP (sFPDP) 17.1
Brand: iWave Global
Availability: InStock

sFPDP 17.1 IP Core is based on ANSI/VITA 17.1-2015 Standards. This IP core provides a relatively simple protocol using maximum available data throughput with a minimum protocol for point-to-point data links. sFPDP links support a wide range of physical interfaces with the most common option being 10 gigabits per second multimode fibre.

CONTACT SALES

AMD Evaluation Kit

AMD Kintex-7 (KC705 Development Board)
AMD Kintex Ultrascale (KCU105 Development Board)
AMD Virtex-7 (VC709 Development Board)
AMD Zynq Ultrascale + MPSoC (ZCU102 Development Board, ZCU106 Development Board)
iG-RainboW G35D (19EG Development Board)
iG-RainboW G30D (5EV Development Board)

Altera Evaluation Kit

Altera Arria 10 GX FPGA Development Kit
Altera Arria 10 (Arria 10 SX development Kit)
Altera Stratix 10 SX SoC Development Kit (H-Tile and L-Tile)
Altera Agilex 7 FPGA F-Series Development Kit (P-Tile and E-Tile)

Features

Details

sFPDP

Compliant with ANSI/VITA 17.1-2015 Serial FPDP standard
Supported link speeds
- Up to 10Gbuad
Data Frames supported
- Unframed Data
- Single Frame Data
- Fixed Size Repeating Frame Data
- Dynamic Size Repeating Frame Data
System Configurations supported
- Basic System Flow Control
- Bi-directional Data Flow
- Copy Mode
- Copy/Loop Mode
- Unidirectional support
- Optional flow control
- Optional CRC
Host-Bus interface
- Parallel FPDP
Configurable parameters Transmit FIFO depth
- Receive FIFO depth
- Transmit FIFO watermark to assert SUSPEND output
- Transmit FIFO watermark for TX FIFO Overflow signal generation
Receive FIFO watermark for STOP/GO signal generation

Highlights

Serial Front Panel Data Port (sFPDP)17.1 IP core for FPGA is based on the ANSI/VITA 17.1-2015 standard
The Serial FPDP17.1 standard supports Up to 10Gbuad link speed.