3U VPX based Zynq Ultrascale+ ZU19/ZU17/ZU11EG SBC with FMC+

iG-PS-AFQ®

Zynq^TMUltrascale+^TM MPSoC family with FFVC1760 package
Compatible with ZU19/ZU17/ZU11 EG devices
64 bit, 4GB DDR4 RAM for PS with ECC
64 bit, 8GB DDR4 RAM for PL
16 GTY Transceivers, 32 GTH Transceivers, 4 GTR Transceivers
3U VPX Connectors based on ANSI/VITA 46.30 (P0+P1A & P1B+P2A)
8 Optical transceivers through MT Ferrule Connector (P2B) based on ANSI/VITA66.4

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Documents

Features	Details
Zynq UltraScale+ ZU19/ZU17/ZU11EG MPSoC	Processing System (PS) Quad/Dual Arm Cortex-A53 @1.5GHz, Dual Cortex-R5 @600MHz Arm Mali-400MP2 GPU @677MHz Programming Logic (PL) Up to 1143K Logic cells & 522K LUTs
Memory	PS: 64bit, 4GB DDR4 RAM with ECC (Expandable) PL: 64bit, 8GB DDR4 RAM (Expandable) 32GB eMMC (Expandable) 128MB QSPI (Expandable)
3U VPX Front Panel	3U VPX Connector (P0+P1A) 1# JTAG Interface 1# IPMA/IPMB Interface 1# Debug UART Interface 1# Gigabit Ethernet 4# PS-GTR Transceivers (up to 6Gbps/lane) Power input (12V, 3.3V_AUX, VBAT) 3U VPX Connector (P1B+P2A) Data Plane Port 8# PL-GTH Transceivers (up to 16Gbps/lane) Control Plane Port 8# PL-GTH Transceivers (up to 16Gbps/lane) MT Ferrule Optical Connector (P2B) 8 Fiber Optical Transceiver using two Firefly Connector (using GTY Transceivers @Upto 28.125Gbps)
3U VPX Back Panel	1# USB Type-C Debug UART
FMC+ (As per VITA 57.4)	8# PL-GTY Transceivers (up to 32Gbps/lane) 16# PL-GTH Transceivers (up to 16Gbps/lane) 160# Single Ended/80# Differential IOs Power input (12V, 3.3V, VADJ: 1.8V/1.5V/1.2V)
General Feature	Slot Profile: SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-8 Slot Pitch: 1 Inch Conduction Cooled Power Supply: +12VDC +/- 5% input from VPX Connector BSP Support: Linux Operating Temperature: -40°C to +85°C Form Factor: 3U VPX (160mm X 100mm) Environment Specification: RoHS and REACH Compliant & CE*