MIL-STD-1553B IP

Name: MIL-STD-1553 IP
Brand: iWave Global
Availability: InStock

The MIL-STD-1553B IP Core implements the MIL-STD-1553B standard and offers a functional interface between the host processor and the MIL-STD-1553 compliant transceiver. It is compatible with standard AXI4-lite interface, enabling seamless integration into FPGA and SoC designs. The MIL STD 1553 IP Core can be programmed as a Bus controller, Remote terminal, or Bus monitor depending on the user's choice.

CONTACT SALES

Documents

Features

Details

MIL-STD -1553 FPGA IP core

General Features

- Compliant with MIL-STD-1553B specification
- All transfer types supported, including RT-to-RT and broadcast transfers
- Dual-redundant bus support
- BC, RT and BM Modes are supported.
- 1 Megabit per sec (Mbps) transfer rate
- AXI4 lite compatibility for user interface

Bus Controller Features

- Communication via redundant bus in case of main bus failure
- Re-transmission of erroneous message over same or alternate bus
- Programmable Inter-Message Gap Time
- Message Format Check

Remote Terminal Features

- Fully compliant with specs
- Having programmable Remote terminal address.
- Receiving broadcast messages traveling on the bus

Bus Monitor Features

- Fully compliant with specs
- Monitors all frames on bus and logs it to memory

Highlights

MIL-STD-1553 IP Core is compliant with MIL-STD-1553B specification
Implements Bus Controller, Remote Terminal, and Bus Monitor implementation on FPGA with deterministic communication over dual-redundant 1553 buses
Standard AXI4-lite compatible for easy integration