Versal™ AI Edge Gen2
3U VPX Plug-in Module (Payload Profile)
iG-G77V®
- SOSA aligned Versal™ AI Edge Gen2 3U VPX board
- Compatible with 2VE3858/3804/3558/3504 Devices with SSVA2112 package
- Four 32-bit, 4GB LPDDR5x
- Supports SOSA Aligned Payload profiles
- IPMC with Arm® 32-bit Cortex®-M0+ CPU
- ADC x4 & DAC x4 with sampling rate up to 1.6GSPS
Documents
| Features | Details |
|---|---|
| SoC | Versal™ AI Edge Gen2 Compatible with 2VE3858/3804/3558/3504 Devices 8x Arm Cortex- A78AE and 10x Cortex R52 Supports AIE-ML v2 up to 144 Tiles Up to 1188K Logic cells and 543K LUTs |
| Memory | 32bit, 4GB LPDDR5x from PS (Upgradable) Three 32bit, 4GB LPDDR5x from PL (Upgradable) 256MB OSPI Flash and 32GB eMMC Flash |
| IPMC | Arm® 32-bit Cortex®-M0+ CPU up to 80 MHz On chip 64KB of flash and 4KB of SRAM One 12-bit 1.68-MSPS analog-to-digital converter (ADC) |
| VPX Front Panel features | Gigabit Ethernet Header USB3.0 Type-C 3-pin Debug UART Header Display Port ADC x4 & DAC x4; Sampling rate up to 1.6GSPS1 |
| VPX On board features | On Board Clock Generators Temperature Sensor x1 Elapse Counter x1 EEPROM x1 |
| 3U VPX Backplane: Connector – P0 |
Utility Plane
|
| 3U VPX Backplane: Connector – P1A +P1B |
Data Plane Port-01
Data Plane Port
Control Plane Port
Expansion Plane Port
System Control Signals (Maskable Reset, SysCON, GDiscrete) |
| 3U VPX Backplane: Connector – P2A |
User defined Port
|
| 3U VPX Backplane: Aperture Pattern J – P2B |
MT Ferrule Module – MM12F – 12 Fibre ports NanoRF -10
|
| Profile Specification | Profile: SLT3-PAY-1F1U1S1S1U1U4F1J-14.6.13-4 Module Profile as per AMPS:
|
| General Features | Slot Pitch: 1 inch Conduction Cooled BSP Support: Linux Environment Specification: RoHS & REACH Compliant |
1ADC x4 &DAC x4 will be either supported in Front panel or Backplane
For any highly integrated System on Modules, thermal design is very important factor. iWave Supports Fan Sink solution for Versal AI Edge Gen2 SOM
