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Design Support
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| Features | Details |
|---|---|
| SoC/FPGA | Kintex™ UltraScale+™ FPGA with B2104 Package Compatible with KU19P, KU095 & KU115 Devices Up to 1842.75K FPGA Logic Cells & 842.4K LUTs |
| CPU | LS1021A with Dual-core Arm® Cortex®-A7 @up to 1.2GHz |
| Memory | FPGA
CPU
|
| Storage | FPGA
CPU
|
| IPMC | IPMC with Arm® 32-bit Cortex®-M0+ CPU @up to 80MHz Up to 512KB of Flash Memory & 128KB of Total SRAM |
| SoC/FPGA to CPU Interfaces | PCIe Gen2 x11 RGMII UART |
| VPX Front Panel Features | USB3.0 & USB 2.0 through USB Type-C Connector x1 10/100/1000Mbps Ethernet through 9-Pin Header x1 3-Pin Console UART Header x1 |
| 3U VPX Backplane: Connector – P0 | Utility Plane
|
| 3U VPX Backplane: Connector – P1A+P1B | Data Plane Port-01
Data Plane Port
Control Plane Port
Expansion Plane
Control Signals (MaskableReset, Gdiscrete,SysCON) |
| 3U VPX Backplane: Connector – P2A |
Expansion Plane
|
| 3U VPX Backplane: Connector – P2B |
MT Ferrule Optical Interconnect with Aperture Pattern J Supports MM12F – 12 Fibre ports |
| VPX On-Board Features | 32Kb EEPROM x1 PCIe Gen2 x1 through M.2 (Key-M) Connector x1 Temperature Sensor x1 Elapse Time Counter x1 On-Board Clock Generators |
| Profile Specification |
Module Profile as per AMPS: MODA3-16.6.13-1-0-F2C-(E8-E7)(P3D-P3D)(E7)[N]
Module Profile as per AMPS: MODA3-16.6.13-1-4-F2C-(E8-E7)(P3D-P3D)(E7)[E12] |
| General Specifications | Slot Pitch: 1 Inch Conduction Cooled BSP Support: Linux/Vivado 2024 or above Environmental Specification: RoHS & REACH Compliant |
1 By default one GTY transceiver channel is connected with on-SOM PCIe transceiver

For any highly integrated FPGA VPX Plug-in Module, thermal design is a very important factor. iWave supports a VITA 65.0 compliant 3U Conduction Cooled Heat Spreader



