Documents
Documents
Design Support
Application Note
SDR Framework
| Features | Details |
|---|---|
| SoC | ZU48/ZU47/ZU43/ZU28/ZU27/ZU25DR (FFVG1517 Package)
Processing System (PS)
Programming Logic (PL)
|
| Memory | 64bit, 8GB DDR4 RAM for PS with ECC 64bit, 8GB DDR4 RAM for PL |
| Storage | 32GB eMMC Flash Expandable up to 128GB 256MB QSPI Flash |
| Board to Board Connector1 Interfaces (400pin) | ADC: 8 x ADC Channels up to 5Gsps DAC: 8 x DAC Channels up to 9.85Gsps PL IOs: PL IOs – 169 IOs
|
| Board to Board Connector2 Interfaces (400pin) | From PL Block
From PS Block
Clock signals
|
| Software Features | Yocto Linux BSP with Vivado support DMA/BRAM test apps PYNQ prototyping support Multi-tile sync & PCIe (XDMA) validated MATLAB support |
| General Features |
|

ADC Channels (Up to x8):
- 1 x Right Angle SMA connector on Front Panel with Balun (BW 10MHz To 3GHz)
- Up to 3 x Right Angle SMA connectors on Front Panel with Balun (BW 3.1GHz To 5.8GHz)
- 1 x Straight SMA connectors with Balun (BW 10MHz To 3GHz)
- Up to 3x Straight SMA connectors with Balun (BW 3.1GHz To 5.8GHz)
DAC Channels (Up to x8):
- 1 x Right Angle SMA connector on Front Panel with Balun (BW 10MHz To 3GHz)
- Up to 3 x Right Angle SMA connectors on Front Panel with Balun (BW 3.1GHz To 5.8GHz)
- 1 x Straight SMA connectors with Balun (BW 10MHz To 3GHz)
- Up to 3x Straight SMA connectors with Balun (BW 3.1GHz To 5.8GHz)
High Speed and Interface Specifications:
- PCIe x8 Edge Connector Up to Gen4 for high-throughput streaming
- FMC+ High Pin Count (HPC) expansion connector support
- External clocking interfaces for SYSREF, reference clock, and synchronization
- Debug & DATA UART/JTAG through onboard programming interface


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FAQs
It supports up to 8 channels and 16 channels configurations, offering flexibility for high-performance ADC/DAC-intensive applications.
The System on Module supports high-speed interfaces including JESD204B/C, PCIe Gen3 x8, QSFP+/SFP+, DisplayPort, USB-C, and multiple Ethernet MACs (GEM0/GEM3).
Signal integrity is ensured through strict impedance-controlled PCB design and carefully routed high-speed signals. Robust multi-rail power is implemented using PMICs, discrete regulators, and LC filtering for clean and stable operation.
RFSoC SoM supports Yocto Linux and PYNQ BSPs.
Yes. Our software supports the RF data converters on RFSoC devices, compatible with widely used tools like Xilinx’s RF Analyzer, ensuring easy diagnostics and loopback testing.