SmartNICs first emerged as specialized offload engines designed to accelerate essential networking tasks directly in silicon, easing the burden on host CPUs and improving throughput. These fixed-function designs, built on tightly wired logic or firmware-defined flows, delivered performance but lacked the adaptability demanded by modern infrastructure. As cloud-native microservices, edge computing and real-time analytics became the norm, this rigid architecture could no longer keep pace, leading to a bottleneck in innovation across increasingly dynamic, software-defined environments.
The industry quickly recognized the need for programmable data paths, a shift from static acceleration to dynamic, application-aware networking. This gave rise to next-generation SmartNICs that integrate programmable hardware (like P4 pipelines) with host-side orchestration tools such as DPDK, bridging the gap between raw performance and real-time adaptability.
Data Paths: Optimizing the Flow of Packets for Performance, Agility and Scale
Host Driven Data Path: Reconfigurable Logic, Real-Time Agility
A host-driven data path is a network architecture where the CPU handles packet processing tasks entirely in software offering maximum flexibility, control and integration with modern, cloud-native workflows. Executing data plane tasks such as parsing, classification and forwarding directly in user space. Developers can seamlessly introduce new services, tailor flow handling per tenant or application without the rigidity of traditional, fixed-function hardware.
- Programmable Data Path: Reconfigurable Logic, Real-Time Agility
A programmable data path is a reconfigurable network pipeline that allows developers to define how packets are parsed, matched and processed directly in hardware using high-level languages. Unlike fixed-function ASICs, it offers agility without sacrificing speed executing custom logic at line rate with deterministic latency. Programmable data paths empower infrastructure to evolve in sync with application needs all while maintaining the performance expected of modern data centers.
The Core Challenge: Balancing Determinism, Flexibility and Scale
Modern networks demand a data plane that can adapt to diverse and evolving workloads. Key requirements include:
- Deterministic Low-Latency Processing for time-sensitive and high-frequency traffic.
- Dynamic Deploy ability of Virtual Network Functions (VNFs) and real-time service chaining.
- Scalability Across Virtualized and Cloud-Native Environments, including containers and multi-tenant workloads.
- Seamless Integration with orchestration platforms (Kubernetes, OpenStack) and observability stacks.
iWave’s SmartNIC: Scalable Acceleration Meets Software-Defined Flexibility
iW-Fibre SmartNIC architecture delivers the best of both worlds host-driven control and hardware-level programmability to meet the evolving needs of high-performance networks.
On the host side, iWave integrates DPDK enabled acceleration, allowing user-space applications to bypass the kernel and interact directly with the SmartNIC for low-latency, high-throughput packet processing. This empowers developers to build agile, software-defined data paths with full control from the host.
At the same time, iWave harnesses the power of P4-programmable pipelines within the SmartNIC’s FPGA, enabling fully customizable parsing, matching and action logic at line rate. This allows for protocol-independent, real-time packet handling tailored to diverse and dynamic workloads.
Host Driven Data Path
Programmable Data Path
DPDK-Empowered Host Data Path
- The above Host Driven Data Path architecture showcases iW-Fibre SmartNIC operating in a host-driven data path mode, leveraging DPDK to deliver exceptional throughput and real-time agility.
- The DPDK application running in user space on the host CPU. Using Poll Mode Drivers (PMD) and zero-copy techniques, DPDK bypasses the traditional Linux kernel stack, enabling direct, high-speed access to the SmartNIC.
- Incoming traffic is generated by a Traffic Generator, transmitted via QSFP interfaces to the iW-Fibre’s FPGA shell, which acts as a high-speed packet gateway.
- The SmartNIC rapidly forwards the traffic to the host through PCIe endpoint logic, where DPDK takes over packet handling.
- Processed packets are either looped back to the SmartNIC and re-transmitted to the Traffic Generator for validation or redirected based on logic defined within the DPDK pipeline.
Programmable Host Data Path
- In Programmable Data Path Architecture, high-throughput packets are generated by the Traffic Generator, they enter the iW-Fibre SmartNIC via QSFP Transceivers and flow directly into the P4-powered pipeline inside the FPGA.
- The P4-defined logic orchestrates parsing, header extraction, table lookups and actions entirely in hardware delivering deterministic, line-rate packet processing with sub-microsecond latency.
- This customizable, protocol-independent data plane empowers developers to implement real-time use cases.
- Control flows separately yet synergistically through a DPDK enabled host machine. The DPDK Poll Mode Driver interfaces with user-space applications and communicates over the PCIe x16 link to the iW-Fibre’s control path.
- By decoupling the data and control planes, the architecture offers scalable programmability and agile orchestration.
- Together, this hybrid model transforms the iW-Fibre into a reconfigurable, high-performance network accelerator.
Quantified Results on iWave’s G35-XFibre-100G SmartNIC
To evaluate the performance and architectural trade-offs between host-driven and programmable data paths, we conducted a series of benchmarks on iWave’s G35-XFibre-100G SmartNIC. The results highlight how hardware offloads and intelligent software orchestration impact key performance indicators such as throughput, CPU usage, memory footprint and latency.
- The following tests were tested on Dell PowerEdge R760 server, equipped with 96 cores, 512 GB of RAM and running Rocky Linux 9.5 with kernel version 5.14.0-503.35.1.el9_5.x86_64
- For the test application, 10 high-performance cores running at 4.1 GHz and approximately 10.5 GB of RAM were allocated, ensuring consistent CPU frequency and memory availability throughout the benchmarking process.
Two configurations were tested:
- Host-Driven Path: All packet processing and checksum verification was executed in software using DPDK on the Host CPU.
- Programmable Path: Checksum verification was offloaded to the P4 IP block on the iW-Fibre (executed in hardware), while packet forwarding was handled by DPDK on the host CPU.
The measured results underscore the strengths of each data path in real-world scenarios, providing insight into the performance, efficiency and scalability of each design.
The benchmark results clearly highlight the performance advantages of a Programmable data path architecture. By offloading checksum validation to the P4 IP for hardware acceleration while leveraging DPDK in the host for software-based forwarding, the system achieves a well-balanced trade-off between deterministic processing and software-defined flexibility. The results validate that offloading compute-intensive tasks to programmable hardware not only reduces CPU load but also ensures line-rate performance with ultra-low latency.
Meanwhile, DPDK enables precise control, dynamic flow steering and adaptability all crucial for modern data centre workloads. This co-designed architecture demonstrates how tightly coupled hardware-software integration can deliver high-throughput, scalable and responsive networking pipelines.
The fusion of P4 and DPDK on iWave’s SmartNIC introduces a powerful paradigm shift in data path design eliminating the compromise between performance and programmability. By bringing together hardware-accelerated precision and software defined agility on a unified platform, iWave empowers developers to dynamically tune the data plane for ultra-low latency, high throughput or rapid feature evolution based on real-time demands.
This isn’t just a SmartNIC, it’s a programmable platform engineered for the pace of modern networking. Whether it’s optimizing traffic, enabling microservices or accelerating service function chains in data centers, iWave delivers the scale, speed and control needed to meet tomorrow’s performance benchmark without sacrificing flexibility. From high-frequency trading to cloud-native infrastructure, the platform adapts seamlessly to the demands of latency-sensitive and software-defined environments.
For platform evaluation or additional information, contact mktg@iwave-global.com
