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Ethernet SDR Framework on MPSoC
  • Wideband RF Coverage: Supports 47 MHz to 6 GHz with flexible bandwidth up to 56 MHz, enabling multi-standard SDR applications.
  • Phase-coherent multi-channel synchronization: Across ADC/DAC tiles using SYSREF-driven JESD204B/C deterministic latency.
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Aurora SDR Framework on MPSoC
  • Wideband RF Coverage: Supports 47 MHz to 6 GHz with flexible bandwidth up to 56 MHz, enabling multi-standard SDR applications.
  • Phase-coherent multi-channel synchronization: Across ADC/DAC tiles using SYSREF-driven JESD204B/C deterministic latency.
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PCIe SDR Framework on MPSoC
  • Wideband RF Coverage: Supports 47 MHz to 6 GHz with flexible bandwidth up to 56 MHz, enabling multi-standard SDR applications.
  • Phase-coherent multi-channel synchronization: Across ADC/DAC tiles using SYSREF-driven JESD204B/C deterministic latency.
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Ethernet SDR Framework on RFSoC
  • Direct RF Sampling Architecture: Eliminates external RF front-end with DC up to 2.3 GHz tuning, simplifying design and improving signal integrity.
  • Deterministic Synchronization: Multi-Tile Synchronization (MTS) with SYSREF enables phase-coherent, multi-channel operation.
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Aurora SDR Framework on RFSoC
  • Direct RF Sampling Architecture: Eliminates external RF front-end with DC up to 2.3 GHz tuning, simplifying design and improving signal integrity.
  • Deterministic Synchronization: Multi-Tile Synchronization (MTS) with SYSREF enables phase-coherent, multi-channel operation.
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RFSoC Based Rugged SDR
  • AMD Zynq Ultrascale+ RFSoC ZU48/47/43/28/27/25DR
  • Intel Core Ultra Processor (Meteor Lake) based COM-HPC Mini Module.
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PCIe SDR Framework on RFSoC
  • Direct RF Sampling Architecture: Eliminates external RF front-end with DC up to 2.3 GHz tuning, simplifying design and improving signal integrity.
  • Deterministic Synchronization: Multi-Tile Synchronization (MTS) with SYSREF enables phase-coherent, multi-channel operation.
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SDR Based on ZU48DR RFSoC
  • High-speed ADC/DAC with PCIe-based data streaming, enabling real-time capture, storage, and analog signal reconstruction through a full GNU Radio DSP ecosystem
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SDR Based on ZU7 MPSoC with JESD Data converter
  • High-performance JESD204B ADC/DAC subsystem (AD9680 & AD9144) with deterministic-latency SYSREF and PCIe-based high-speed data streaming for GNU Radio
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