Versal™ Premium Gen2 SmartNIC – 800G

G86-XFibre-800G®

  • Versal Premium Gen2 2VP3602
  • PCIe Gen6 x8 Host Interface
  • Full height, 3/4 Length, Single Slot with Active Cooling PCIe Card
  • Single Front panel 3 x QSFP-DD Connectors
  • Single Gen4 x8 SlimSAS Connector for extended PCIe capabilities
  • Datacenter, HPC applications
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Features Details
PCIe NIC Card Features
  • PCIe Gen6 x8 Host Interface
  • QSFP-DD Connector x 3
  • Full height, ¾ Length, Single Slot with Active Cooling PCIe Card.
  • Versal Premium Gen2 2VP3602 FPGA
    • Speed Grade:-2 for core and transceiver
  • Dual-core Arm Cortex-A72 @1.7GHz, Dual-core Arm Cortex-R5F @800MHz
  • Line Rates:
    • QSFP-DD1- 800 Gbps: Dual 400GbE, 8 × 100G
    • QSFP-DD2- 800 Gbps: Dual 400GbE, 8 × 100G
    • QSFP-DD3- 400 Gbps: Single 400GbE, 4 × 100G
  • Dual SMA Connectors
  • Up to 3.3M Logic cells
  • 1,496K LUTs
  • Single Gen4 x8 SlimSAS Connector
  • PS – 1x32bit, 8GB LPDDR5 *compile time configurable
  • PL – 5x32bit, 40GB LPDDR5 *compile time configurable
  • Dual Gen4 M.2 NVMe Slots
  • Debug – USB-2.0, Type-C Connector
  • Storage Devices
    • 256MB QSPI flash
    • 128GB eMMC Flash (Upgradable)
  • Memory
    • Six 32bit, 8GB LPDDR5x
    • 32Kb EEPROM
  • Micro SD slot
  • 1G Ethernet RJ45
  • PTP and SyncE support
Software Features Linux BSP with (Vivado 2024 or above) Support
General Features
  • Operating Temperature: 0°C to +45°C
  • REACH & RoHS3 Compliant
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OpenNIC:

  • Contains QDMA, CMAC Subsystems, Packet Adapter, User Logic Box and User Plugins
  • Control and Data Interfaces
  • Network Data Transmission at line rate
  • P4 Language for network acceleration

More Info: https://github.com/Xilinx/open-nic-shell

DYNANIC:

  • Uses NDK (Network Development Kit) Architecture
  • Contains Network module to handle Ethernet packet transmission and reception
  • Optimized for high throughput at line rate
  • A user-dedicated space in NDK firmware for application.

More info : https://github.com/CESNET/ndk-fpga

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Product Design Process

Our design process transforms your vision into reality with innovation, quality, and collaboration.

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Certification & Qualification

Ensuring Compliance, Quality, and Trust Through Certification & Qualification.

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Product Lifecycle Management

Ensuring Longevity, Reliability, and Seamless Product Evolution.

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Mechanical Services

Precision Engineering for Reliable, High-Performance Mechanical Solutions.

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FAQs

An FPGA-based programmable PCIe Accelerator NIC that offloads packet processing (L2/L3 forwarding, ACLs, QoS, security, custom workloads, AI Inference , Trading logic ) from the host CPU to hardware.

10/40G – (Zynq™ UltraScale+™, Arria® 10)
100G – Zynq™ UltraScale+™
200G – Agilex™ 7
400G – Agilex™ 7, Versal™ Premium
800G – Versal™ Premium Gen2

OpenNIC, Corundum, AVED and DYNANIC on AMD cards, NDK, Altera OFS and ASAF on Agilex cards.

Yes: SR-IOV, VirtIO, and Open vSwitch offload.

Yes, a bitstream and SW , design patch are provided as a part of deliverables.

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