iWave’s Versal Premium platform supports CPM Mode for PCI Express, offering a high-bandwidth, scalable, and reliable serial interconnect. By configuring the integrated block for PCIe with DMA/Bridge and CCIX-PCIe Module (CPM), designers can implement solutions compliant with PCIe Base Specification Revision 5.0 (CPM5).
The iWave Versal Premium System on Module (SoM) is a high-performance computing platform built on AMD’s Versal Premium series of adaptive SoCs. Designed for next-generation networking, data center, and high-speed communication applications, the module integrates powerful processing elements, advanced programmable logic, and high-bandwidth connectivity into a compact, production-ready form factor.
Featuring dual Arm Cortex-A72 and Cortex-R5F processors, along with a rich set of high-speed GTM Transceiver channels (up to 112 Gbps PAM4) and GTYP Transceiver Channels (up to 32.75Gbps) , the platform delivers exceptional flexibility for building high-throughput, low-latency systems. It combines processing, acceleration, and adaptability in a single device, enabling developers to rapidly prototype and deploy complex workloads such as data-plane acceleration, network packet processing, and cloud infrastructure solutions.
The SoM is fully supported with Xilinx Vivado/Vitis design tools and Linux BSPs, allowing seamless hardware-software co-development. Its industrial-grade design, extended lifecycle, and scalability make it ideal for performance-critical embedded systems across telecom, aerospace, defense, and high-speed computing domains.
Block Diagram:
Key Features of iWave Versal device with CPM5 Gen5 PCIe
PCIe Specification Support:
- Two independent controllers support up to PCIe Gen5 ×8 also backward compatible with Gen4/Gen3/Gen2/Gen1 and One controller when configured at x16 link width Gen4
- Operating Modes: Endpoint, Root Port, Switch Port Upstream, Switch Port Downstream, and Legacy Endpoint modes.
- Integration with NoC: High-bandwidth AXI interfaces bridge CPM5 to PS subsystems.
- Gen1 (2.5 GT/s/lane), Gen2 (5.0 GT/s/lane), Gen3 (8.0 GT/s/lane), Gen4 (16.0 GT/s/lane) rates at up to x16 link widths.
- Gen5 (32.0 GT/s/lane) rate at up to x8 link widths.
- AXI4-Stream transaction-layer interfaces to programmable logic (RQ/RC/CQ/CC)
- Advanced error reporting (AER) and end-to-end CRC (ECRC)
- One virtual channel, eight traffic classes.
- Single-root I/O virtualization (SR-IOV)
- MSI-X, MSI, and INTx interrupt support
Rootport:
Versal Premium Devkit as Root complex with PCIe Gen5 module connected in x16 port of Devkit
Endpoint:
Versal Premium Devkit as Endpoint mode connected to Host PC via PCIe jumper cable
Performance Advantages
- Speed: Up to 32 GB/s (Gen5 ×8 )
- Latency: Lower latency compared to soft IP due to hardened architecture.
- Resource Efficiency: Saves PL resources for customer acceleration logic.
- Power Optimization: Hardened PCIe implementation consumes less power than logic-based designs.
Typical Use Cases
- Datacenter Accelerators: High-bandwidth FPGA accelerators interfacing with host CPUs via Gen5 PCIe.
- Storage Applications: NVMe SSD controllers, storage accelerators with DMA-based transfers.
- Heterogeneous Compute: High-speed ARM ↔ FPGA ↔ PCIe host communication in Versal Premium designs.
Design & Development Flow
- Configuration:
- CPM5 is configured through Vivado IP Integrator or the Versal CIPS block.
- Link width and speed (Gen5 ×8 / Gen4 / Gen3) can be auto negotiated based on system design.
- Software Enablement:
- PetaLinux and Yocto support CPM5 PCIe through the FPGA Manager and PCIe subsystems.
- Standard Linux PCIe drivers can enumerate CPM5 as an endpoint or root port.
- Example Designs:
- iWave provides reference designs for CPM5 PCIe RootPort and QDMA (Queue-based DMA) EndPoint mode.
- These serve as starting points for high-bandwidth application development.
- Configuration:
Conclusion
The CPM5 Gen5 PCIe subsystem on iWave’s Versal Premium platform redefines high-speed interconnect design. By combining hardened Gen5 ×8 PCIe, dual-mode operation (Endpoint /RootPort), and QDMA acceleration, developers can achieve unparalleled bandwidth, low latency, and efficiency. With comprehensive hardware, software support and proven iWave reference designs, this platform empowers engineers to unlock the full potential of next-generation data center, networking, and storage solutions.
For more information feel free to contact us at mktg@iwave-global.com
