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Get started with Stratix10 GX/SX SoC FPGA SOM Development Platform

Unpacking

Remove the Development Platform from box and place above the ESD free area. Use anti-static pad/mat with proper grounding to place the Development Platform. Also make sure that, below deliverables are received without any physical damage.

Development kit contains:

Stratix10 GX/SX SoC FPGA SOM Development kit

Stratix10 GX/SX SoC FPGA SOM Development Platform

Stratix10 GX/SX SoC FPGA SOM Development-kit_heatsink

Heatsink+FAN

12V, 14A Power Supply

12V, 14A Power Supply

USB Debug Cable

USB Debug Cable

Safety Guidelines

Environmental Compliance
iG-G45M® Stratix10 GX/SX SoC FPGA SOM  Development Platform is designed by using oHS and REACH compliant components and manufactured on lead-free production process.

Environmental Compliance

ESD Protection
This development platform is ESD sensitive. Handle the product only in accordance with the installation instructions given in the manual. Therefore ESD precautions should be taken care during transport and handling. Must use a ESD ground strap or other grounded source before unpacking or handling the hardware.

ESD Protection

Product Disposal
Check the local regulations for disposal of electronic products before disposing.

Product Disposal

Get to know

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Stratix10 GX/SX SoC FPGA SOM – Top view

1. Stratix10 GX/SX SoC FPGA
2. JTAG/Active Serial Header
3. Boot mode Switch
4. Fan connector

Stratix10 GX/SX SoC FPGA SOM – Bottom view

Stratix10 GX/SX SoC FPGA SOM – Bottom view

5. Board to Board connector 4
6. Board to Board connector 3
7. Board to Board connector 2
8. Board to Board connector 1

PRGVZ TOP 1

Stratix10 GX/SX SoC FPGA Development Platform – Top view

01. Firefly Connector**
02. Firefly Power Connector**
03. Board to Board Conn 4
04. Board to Board Conn 2
05. PMOD Connector 2
06. JTAG Header
07. RESET Switch
08. PMOD Connector 1
09. QSFP+ Connector
10. Power ON/OFF Switch
11. Power IN Connector

12. Debug Port
13. 20 Pin GPIO Header
14. USB OTG Connector
15. GEM0 Ethernet Jack
16. GEM3 Ethernet Jack**
17. Display Port
18. XCVR Config Switch
19. SFP+ Connector
20. PCIe x 1 Connector
21. SDI IN HD BNC Jack
22. SDI OUT HD BNC Jack

23. HDMI OUT Connector**
24. CAN Header**
25. HDMI IN Connector**
26. USB Type C Connector
27. FMC Connector
28. Board to Board Conn 1
29. FMC+ Connector
30. Board to Board Conn 3
31. 12V FAN Header

**Not Supported

Stratix10 GX/SX SoC FPGA Development Platform – Bottom view

Stratix10 GX/SX SoC FPGA Development Platform – Bottom view

32. RTC Battery Holder
33. Standard SD Connector
34. M.2 SATA Connector**

35. SMA Connector 2
36. SMA Connector 1

**Not Supported

Boot Switch Setting

Make sure On-Board Switch (SW1) is set properly as shown below image

Startix10 Booth Switch
Swtich table

Debug Port Setting

Connect Type-A end of USB cable to PC and Micro-B end of USB cable to Development platform’s debug Micro USB connector(J13) as shown below.

Stratix10 GX/SX SoC FPGA Development Platform –

Install the driver for Debug Port in Host PC/Laptop using the below link.
https://ftdichip.com/products/ft232rq/

JTAG Connection

iG-G45M® Stratix10 GX/SX SoC FPGA SOM  platform support JTAG interface for FPGA Programming and debugging. Use the USB Blaster to connect SOM.
Example USB Blaster which is tested with this Platform is mentioned below.
USB Blaster-2
Part Number : PL-USB2-BLASTER from INTEL

iG-G45M® Stratix10 GX/SX SoC FPGA SOM - JTAG

Heat Sink Integration

iG-G45M® Stratix10 GX/SX SoC FPGA SOM  Development platform comes with Heatsink+Fan attached to it. Make sure to power up the platform only with Heatsink+Fan attached.
Below is the Heatsink+Fan integration procedure for reference.

Heat Sink

Heatsink + Fan

Thermal Pad

Peel off Thermal pad sticker

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Powering ON

Connect the Power supply plug to the Power connector (J10) of the Development platform as shown below and switch ON the power supply. Once power is applied to the Development platform, the power LED in the Development platform will glow as shown in the below image.

iW RainboW 45D Stratix10 GXSX SoC FPGA SOM POWER

Warning:

Test Environment setup

Once power is applied to the Development Platform as explained in the previous section, boot messages being displayed in the debug terminal of the PC/Laptop which is connected to the Development platform. Press any key in terminal immediately to see the command prompt of the Boot loader or wait until OS boots. After OS boots, Login prompt being displayed in the debug terminal. Enter username and password as “root” to get the Linux command prompt as shown below.

Test Environment

Command Prompt

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