July 31, 2026
Article
MATLAB RFSoC SoM are transforming modern next-generation RF applications such as Software Defined Radio (SDR), radar, electronic warfare, and wireless communications by enabling highly flexible architectures capable of processing large volumes of RF data with low latency and real-time adaptability.
To address these challenges, iWave has enabled a model-based RF development workflow by combining its iG60M® Zynq™ UltraScale+™ RFSoC System on Module (SoM) with MATLAB®, Simulink®, and SoC Block set™ enabling a seamless path from algorithm development to real-time hardware implementation.
The capability is demonstrated through real-time RF applications, including Transmit Receive Tone and Frequency Hopping, showcasing the iWave RFSoC platform ability to perform high-speed signal processing, dynamic frequency control, and efficient RF Data Converter (RFDC) integration.
The combination of MATLAB®, Simulink®, and SoC Block set™ provides a complete workflow ecosystem for developing and deploying advanced RF applications on iWave Zynq™ UltraScale+™ RFSoC platform.
Integrating MATLAB with the iWave RFSoC platform enables engineers to:
Transmit and Receive Tone serves as the first validation step for most RF applications.
The Transmit and Receive Tone example demonstrates a complete end to end RF signal processing chain on the iWave RFSoC platform. A digital tone is generated in MATLAB/Simulink, transmitted through the RF Data Converter (RFDC) DAC interface, looped back or received through the ADC interface, and analyzed to verify signal integrity, frequency accuracy, and overall system performance.
This implementation showcases seamless integration between the RF Data Converter (RFDC), FPGA programmable logic (PL), and ARM® processing system (PS), enabling real-time RF signal generation, acquisition, and processing on a single adaptive computing platform.
The workflow leverages:
The Transmit and Receive Tone workflow demonstrates a seamless transition from system simulation to real-time hardware execution on the iWave iG-G60M® Zynq™ UltraScale+™ RFSoC ZU48DR/ZU47DR System on Module.
Before deploying the design to hardware, developers can simulate the end-to-end signal path, ensuring correct functionality of the RF Data Converter (RFDC), programmable logic (PL), processing system (PS), and memory interfaces.
During simulation, the generated tone is transmitted through the RFDC DAC and observed on the DAC Output Spectrum Analyzer, confirming successful waveform generation. The signal is then routed through the RFDC loopback path, captured by the RFDC ADC, and transferred to the processing system through shared memory. The received waveform is analyzed in both the time domain and frequency domain using Transmit and Receive Tone visualization tools, allowing engineers to verify signal integrity, frequency accuracy, and overall system behavior before hardware deployment.
Once the simulation is successfully validated, the design is automatically translated into hardware. HDL Coder™ generates synthesizable FPGA logic for the programmable logic, while Embedded Coder® generates optimized software for the Arm® processing system. Using SoC Blockset™, the complete hardware and software design is built and deployed onto the iWave RFSoC platform.
After deployment, the transmitted and received signals can be observed in real time. The received waveform closely matches the transmitted tone, validating the end-to-end RF signal chain and confirming proper operation of the RF Data Converters, FPGA logic, and processing system. This simulation to hardware workflow enables engineers to identify and resolve design issues early, significantly reducing development time and accelerating deployment of advanced RF applications.
Key Outcomes
Beyond the Transmit and Receive Tone, iWave has successfully validated the Frequency Hopping workflow on the iG-G60M® ZU48/ZU47DR RFSoC platform, enabling rapid development of advanced RF applications.
Frequency Hopping Spread Spectrum (FHSS) is a communication technique where the carrier frequency rapidly changes according to a predefined hopping sequence shared between the transmitter and receiver.
By continuously switching across multiple frequency channels, FHSS improves communication reliability by reducing the impact of interference, congestion, and intentional jamming.
Due to these advantages, frequency hopping is widely adopted in secure wireless communication, aerospace, defense, radar, avionics, and SDR applications where reliable RF connectivity is essential.
To demonstrate this capability, iWave implemented a frequency hopping application on the iG60M® Zynq™ UltraScale+™ RFSoC 48DR/ZU47DR System on Module (SoM) using MATLAB® and Simulink®.
The implementation leverages the integrated RF Data Converter (RFDC) and real-time Numerically Controlled Oscillator (NCO) control to dynamically update carrier frequencies directly within the RFSoC hardware.
This approach eliminates the requirement for external frequency synthesizers, reduces system complexity, and enables low-latency frequency switching for frequency-agile RF systems.
A frequency hopping system relies on precise coordination between the transmitter and receiver, where both follow a synchronized hopping sequence to dynamically switch carrier frequencies during communication. This enables reliable data transmission even in challenging RF environments affected by interference and congestion.
In conventional frequency hopping implementations, the processor manages the hopping sequence and controls external frequency synthesizers to generate the required carrier frequencies. While effective, this approach introduces processing delays, increases hardware complexity, and limits the ability to achieve high-speed, real-time frequency transitions.
iWave RFSoC based architecture simplifies frequency hopping by leveraging the integrated RF Data Converter (RFDC) capabilities of the Zynq™ UltraScale+™ RFSoC platform. The RFDC’s real-time Numerically Controlled Oscillator (NCO) control enables direct frequency updates from the Programmable Logic (PL), eliminating the need for external frequency synthesizers and reducing software dependency.
By moving frequency control closer to the hardware, the platform delivers faster frequency switching, deterministic timing, and improved system integration. This highly integrated approach enables developers to build next-generation frequency agile systems for applications such as Software Defined Radio (SDR), radar, electronic warfare, and secure wireless communications.
After simulation, the design is deployed to the custom RFSoC ZU48/47DR platform using the SoC Builder workflow for real-time hardware validation.
The hardware test successfully demonstrated frequency transitions on the transmit path while maintaining synchronization between the transmitter and receiver. The receiver consistently generated a stable 1 MHz tone, confirming accurate frequency hopping and precise timing alignment between both RF paths.
Validating the complete design through simulation before hardware deployment simplified integration, reduced debugging effort, and accelerated the overall RF development process.
iWave RFSoC platforms support multiple generations, offering PCIe ADC/DAC cards, SoMs, COTS & 3UVPX Module for quick evaluation, scalable, multi-tile & multi-board synchronization for flexible system development.
From frequency hopping and real-time signal processing to SDR, radar, and wireless communication systems, iWave RFSoC solutions enable flexible, high-performance RF development with reduced complexity and faster time to market.
iWave Global is a leading provider of embedded computing solutions specializing in System on Modules, FPGA platforms, and ODM services. With deep expertise in high-performance and RF systems, iWave enables customers to accelerate product development and time to market.
For more information, please write to mktg@iwave-global.com
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