Enabling Next-Generation Wideband Signal Processing

The demand for faster, more efficient, and flexible signal acquisition systems is reshaping industries from 5G communications to defense and medical imaging. Traditional RF systems rely on complex analog front-ends with multiple down-conversion stages, increasing latency, cost, and design complexity.

Direct RF sampling changes this paradigm. By digitizing signals directly at multi-gigahertz frequencies, engineers can design simpler, more compact, and reconfigurable platforms. This approach not only accelerates system performance but also enables software-defined architectures adaptable to evolving application needs.

To address this demand, iWave has integrated the Analog Devices AD9207 — a dual-channel, 12-bit, 6 GSPS ADC — into its custom Zynq™ UltraScale+™ MPSoC board. This powerful combination delivers real-time, wideband digitization with the flexibility of FPGA-based processing, unlocking innovation in next-generation RF systems.

AD9207: High-Speed ADC for Direct Sampling

The Analog Devices AD9207 was selected for its ability to handle high-frequency, high-bandwidth workloads. Key features include:

• 12-bit, dual-channel resolution for excellent SNR and SFDR
• Sampling rates up to 6 GSPS, enabling direct digitization of signals up to 8 GHz
• JESD204B/C interface with up to 8 lanes at 25 Gbps each for scalable data throughput
• On-chip DSP features including digital downconverters and programmable filters to ease FPGA load

By minimizing analog stages, the AD9207 allows engineers to build compact, precise, and reconfigurable RF systemsthat are both faster and more cost-efficient.

Seamless Integration with Zynq™ UltraScale+™ MPSoC

At the heart of the platform lies iWave’s Zynq UltraScale+ MPSoC custom board, purpose-built for high-speed data acquisition. Key integration highlights include:

• High-Speed JESD204C Interface: 8 serial lanes at up to 25 Gbps each ensure low-latency, high-throughput data transfer.
• Advanced Clocking: The LMK04828 clock synthesizer delivers low-jitter reference clocks for precise synchronization across ADC and FPGA logic — critical for radar and phased-array systems.
• Optimized PCB Layout: Careful high-speed routing with impedance control and isolated power domains preserves signal integrity at gigahertz frequencies.

This design ensures that the full performance of the AD9207 is realized while leveraging the processing flexibility of the Zynq™ UltraScale+™ MPSoC.

Proven Validation and Testing

The integrated platform underwent rigorous validation to guarantee robust performance:

1. Device Configuration – The AD9207 was controlled via its SPI interface using Linux IIO drivers.
2. Link Verification – JESD204C lane alignment and SYSREF synchronization were tested to ensure dual-channel phase consistency.
3. Test Signal Capture – A 1GHz analog signal was applied as input, sampled at up to 6Gsps, and transmitted through the JESD204C link to the FPGA.
4. Data Processing – Custom JESD204C IP cores in the FPGA handled data filtering, transformations, and storage.
5. Visualization – Captured signals were viewed using ADI’s IIO Oscilloscope software on a PC, validating both time-domain waveforms and FFT outputs.
6. Performance Analysis – Internal test patterns and external sources were compared to verify signal integrity, error detection, and system optimization.

This thorough validation confirmed that the platform is ready for deployment in demanding real-world environments.