August 28, 2026
Article
Zynq™ UltraScale+™ MPSoC ZU5 enables low-latency, real-time video processing where every millisecond matters. Latency—the time delay between receiving a video signal and delivering the corresponding output—plays a critical role in determining the responsiveness and performance of a video processing system. Excessive latency can result in delayed video feedback, synchronization issues, and reduced performance in applications that require real-time operation.
End to end video latency can be introduced at multiple stages of the processing pipeline, including video interface reception, FPGA processing, frame buffering, DDR memory access, and output transmission. Understanding and measuring these delays is therefore essential when designing high-performance video systems.
To evaluate the real-time video performance of the platform, latency validation was performed on iWave’s iG-G36S® Zynq™ UltraScale+™ MPSoC ZU5/ZU4/ZU3/ZU2 SBC. The validation examines different video input to output paths and measures the end to end delay across the complete video processing pipeline.
The SDI-IN to SDI-OUT test measures the end-to-end delay between receiving a video signal through the SDI input interface and transmitting the corresponding video through the SDI output interface.
The SDI input signal is first received through the UHD SDI GT interface. The SDI Receive Subsystem processes the incoming video stream and transfers the video data to the frame buffer.The frame buffer stores the video data in the DDR memory connected to the Processing System. The stored video data is then read from DDR memory and transferred to the SDI Transmit Subsystem for output transmission.
The SDI-IN to SDI-OUT path achieves a measured latency of just 14 ms at 1080p @ 60 FPS. At 60 FPS, each video frame is approximately 16.67 ms, meaning the measured latency is equivalent to only 0.84 of a frame. This demonstrates a low-latency signal path with less than one frame of delay, making the solution well suited for real-time video monitoring, live production, and professional broadcasting applications.
Figure 1: Dataflow from SDI-IN to SDI-OUT on G36S ZU5/ZU4/ZU3T/ZU3/ZU2/ZU1 SBC
The SDI-IN to DP-OUT latency refers to the time taken from receiving the SDI video input to delivering the processed video through the DisplayPort output. The input video from an SDI source such as a camera or switcher passes through the FPGA-based video processing pipeline, where it is received, buffered, processed, and converted for DisplayPort output.
At 1080p @ 60 FPS, the measured end-to-end latency is approximately 8 ms. With a theoretical frame period of 16.67 ms at 60 FPS, this corresponds to approximately 0.48 frame of latency.
The measured result demonstrates a sub frame, low-latency video path, supporting responsive real-time video display and processing. This makes the architecture well suited for applications such as professional video monitoring, live production, broadcast, and real-time video processing.
Figure 2 : Dataflow from SDI-IN to DP-OUT on G36S ZU5/ZU4/ZU3T/ZU3/ZU2/ZU1 SBC
The HDMI-IN to DP-OUT latency represents the time taken to receive an HDMI video signal, process it through the FPGA-based video pipeline, and deliver the resulting video through the DisplayPort output. The HDMI input can receive digital video and audio from sources such as cameras, computers, or media players. The signal is then processed, buffered, and converted into a format suitable for DisplayPort output.
At 1080p @ 60 FPS, the measured end-to-end latency is approximately 41 ms. With a theoretical frame period of 16.67 ms at 60 FPS, this corresponds to approximately 2.46 frames of latency.
The measured latency reflects the combined impact of video processing, frame buffering, scaling, memory access, and HDMI-to-DisplayPort signal conversion. This evaluation provides a practical indication of the system’s real-time video performance and helps validate the complete HDMI-to-DisplayPort processing pipeline.
Figure 3: Dataflow from HDMI-IN to DP-OUT on G36S ZU5/ZU4/ZU3T/ZU3/ZU2/ZU1 SBC
| Video Path | Resolution | Frame Rate | Measured Latency | Frame Equivalent |
|---|---|---|---|---|
| SDI-IN to SDI-OUT | 1080p | 60 FPS | 14 ms | 0.84 Frame |
| SDI-IN to DP-OUT | 1080p | 60 FPS | 8 ms | 0.48 Frame |
| HDMI-IN to DP-OUT | 1080p | 60 FPS | 41 ms | 2.46 Frames |
The results show that latency varies depending on the architecture of the video processing pipeline and the number of processing and buffering stages involved.
The SDI video paths demonstrate sub frame latency at 1080p @ 60 FPS. The HDMI-IN to DisplayPort path introduces additional latency due to the processing stages included in the pipeline.
Low-latency video transmission is essential for delivering responsive and reliable performance across live broadcasting, video monitoring, gaming, video conferencing, and professional video production. Minimizing the delay between video input and output enables smoother real-time interaction and more accurate monitoring. The measured SDI and HDMI latency provides a clear indication of the efficiency of the overall video processing path, while optimizing signal conversion, buffering, and processing stages can further reduce latency and enhance system performance. Ultimately, an optimized low-latency video pipeline ensures seamless, real-time video delivery for demanding professional and interactive applications.
To learn more about iWave embedded solutions and design services, visit www.iwave-global.com or contact us at mktg@iwave-global.com
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